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? semiconductor components industries, llc, 2014 july, 2017 ? rev. 9 1 publication order number: ncv4264?2/d ncv4264-2 low i q low dropout linear regulator the ncv4264?2 is functionally and pin for pin compatible with ncv4264 with a lower quiescent current consumption. its output stage supplies 100 ma with 2.0% output voltage accuracy. maximum dropout voltage is 500 mv at 100 ma load current. it is internally protected against 45 v input transients, input supply reversal, output overcurrent faults, and excess die temperature. no external components are required to enable these features. features ? 3.3 v and 5.0 v fixed output ? 2.0% output accuracy, over full temperature range ? 60 a maximum quiescent current at i out = 100 a ? 500 mv maximum dropout voltage at 100 ma load current ? wide input voltage operating range of 4.5 v to 45 v ? aec?q100 grade 1 qualified and ppap capable ? internal fault protection ? ?42 v reverse voltage ? short circuit/overcurrent ? thermal overload ? this is a pb?free device sot?223 st suffix case 318e pin connections www. onsemi.com marking diagram x = 5 (5.0 v version) = 3 (3.3 v version) a = assembly location l = wafer lot y = year w = work week = pb?free package see detailed ordering and shipping information in the package dimensions section on page 9 of this data sheet. ordering information 1 2 3 tab 1 ayw v642x (note: microdot may be in either location) (sot?223) pin function 1v in 2,tab gnd 3v out (soic?8 fused) pin function 1nc 2, v in 3 gnd 4. v out 5?8. nc 1 8 soic?8 fused case 751 v642x alywx 1 8
ncv4264?2 www. onsemi.com 2 in + - error amp out gnd figure 1. block diagram 1.3 v reference thermal shutdown pin function description pin no. symbol function sot?223 soic?8 1 2 v in unregulated input voltage; 4.5 v to 45 v. 2 3 gnd ground; substrate. 3 4 v out regulated output voltage; collector of the internal pnp pass transistor. tab ? gnd ground; substrate and best thermal connection to the die. ? 1, 5?8 nc no connection. operating range rating symbol min max unit v in , dc input operating voltage (note 3) v in 4.5 +45 v junction temperature operating range t j ?40 +150 c maximum ratings rating symbol min max unit v in , dc input voltage v in ?42 +45 v v out , dc voltage v out ?0.3 +18 v storage t emperature t stg ?55 +150 c moisture sensitivity level sot223 soic?8 fused msl 3 1 ? esd capability, human body model (note 1) v esdhb 4000 ? v esd capability, machine model (note 1) v esdmim 200 ? v lead temperature soldering reflow (smd styles only), lead free (note 2) t sld ? 265 pk c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be af fected. 1. this device series incorporates esd protection and is tested by the following methods: esd hbm tested per aec?q100?002 (eia/jesd22?a 1 14c) esd mm tested per aec?q100?003 (eia/jesd22?a 1 15c) 2. lead free, 60 sec ? 150 sec above 217 c, 40 sec max at peak. 3. see specific conditions for dc operating input voltage lower than 4.5 v in the electrical chracteristics table at page 3
ncv4264?2 www. onsemi.com 3 thermal resistance parameter symbol min max unit junction?to?ambient sot?223 soic?8 fused r ja ? 99 (note 4) 145 c/w junction?to?case sot?223 soic?8 fused r jc ? 17 ? electrical characteristics (v in = 13.5 v, t j = ?40 c to +150 c, unless otherwise noted.) characteristic symbol test conditions min typ max unit output v oltage 5.0 v version v out 5.0 ma i out 100 ma (note 5) 6.0 v v in 28 v 4.900 5.000 5.100 v output v oltage 3.3 v version v out 5.0 ma i out 100 ma (note 5) 4.5 v v in 28 v 3.234 3.300 3.366 v output v oltage 3.3 v version v out i out = 5 ma, v in = 4 v (note 7) 3.234 3.300 3.366 v line regulation 5.0 v version v out vs. v in i out = 5.0 ma 6.0 v v in 28 v ?30 5.0 +30 mv line regulation 3.3 v version v out vs. v in i out = 5.0 ma 4.5 v v in 28 v ?30 5.0 +30 mv load regulation v out vs. i out 1.0 ma i out 100 ma (note 5) ?40 5.0 +40 mv dropout voltage ? 5.0 v v ersion v in ?v out i out = 100 ma (notes 5 & 6) ? 270 500 mv dropout voltage ? 3.3 v v ersion v in ?v out i out = 100 ma (notes 5 & 8) ? ? 1.266 v quiescent current i q i out = 100 a t j = 25 c t j = ?40 c to +85 c t j = ?40 c to 150 c ? ? ? 33 33 33 55 60 70 a active ground current i g(on) i out = 50 ma (note 5) ? 1.5 4.0 ma power supply rejection psrr v ripple = 0.5 v p?p , f = 100 hz ? 67 ? db output capacitor for stability 5.0 v version c out esr i out = 0.1 ma to 100 ma (notes 5 & 7) 10 ? ? ? ? 9.0 f output capacitor for stability 3.3 v version c out esr i out = 0.1 ma to 100 ma (notes 5 & 7) 22 ? ? ? ? 16 f protection current limit i out(lim) v out = 4.5 v (5.0 v version) (note 5) v out = 3.0 v (3.3 v version) (note 5) 150 150 ? ? 500 500 ma short circuit current limit i out(sc) v out = 0 v (note 5) 40 ? 500 ma thermal shutdown threshold t tsd (note 7) 150 ? 200 c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. 1 oz., 100 mm 2 copper area. 5. use pulse loading to limit power dissipation. 6. dropout voltage = (v in ?v out ), measured when the output voltage has dropped 100 mv relative to the nominal value obtained with v in = 13.5 v. 7. not tested in production. limits are guaranteed by design. 8. v do = v in ? v out . for output voltage set to < 4.5 v, v do will be constrained by the minimum input voltage. figure 2. applications circuit 4264?2 v out c out 10 f ? 5.0 v v ersion 22 f ? 3.3 v v ersion output c in 100 nf gnd 4.5?45 v input v in
ncv4264?2 www. onsemi.com 4 typical characteristic curves ? 5 v version figure 3. esr stability vs. output current (5 v version) 0 2 4 6 8 10 12 0 50 100 150 200 figure 4. quiescent current vs. output current (5 v version) output current (ma) quiescent current (ma) 125 c ?40 c 25 c v in = 13.5 v 0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0 5 10 15 figure 5. quiescent current vs. output current (light load) (5 v version) output current (ma) quiescent current (ma) 125 c ?40 c 25 c v in = 13.5 v output current (ma) 75 100 50 25 0 0 6 8 10 esr ( ) 150 125 stable region v in = 13.5 v c out 10 f 4 2 unstable region 1 3 5 7 9 figure 6. dropout voltage vs. output current (5 v version) output current (ma) 200 150 100 50 0 0 0.05 0.10 0.15 0.20 0.30 0.40 0.45 dropout voltage (v) 0.25 0.35 125 c ?40 c 25 c figure 7. output v oltage vs. temperature (5 v version) temperature ( c) 150 100 50 0 ?50 4.90 4.92 4.94 4.98 5.00 5.04 5.08 5.10 output voltage (v) 4.96 5.02 5.06
ncv4264?2 www. onsemi.com 5 typical characteristic curves ? 5 v version figure 8. output current vs. input voltage (5 v version) input voltage (v) 50 40 30 20 10 0 0 20 40 60 80 100 160 output current (ma) 120 140 t a = 25 c t a = 125 c figure 9. output voltage vs. input voltage (5 v version) input voltage (v) 1 0 8.0 6.0 4.0 2.0 0 0 1.0 2.0 3.0 4.0 5.0 6.0 output voltage (v) r l = 50 180 0 2 4 6 8 10 12 14 16 01020 50 figure 10. quiescent current vs. input voltage (5 v version) input voltage (v) quiescent current (ma) r l = 50 r l = 100 30 40
ncv4264?2 www. onsemi.com 6 typical characteristic curves ? 3.3 v version figure 11. quiescent current vs. output current (3.3 v version) figure 12. output voltage vs. input voltage (3.3 v version) output current (ma) input voltage (v) 175 150 125 100 75 50 25 0 0 1 2 3 4 8 9 10 40 35 30 20 15 10 5 0 0 0.3 0.6 0.9 1.2 2.7 3.0 3.6 figure 13. quiescent current vs. input voltage (3.3 v version) input voltage (v) 20 15 10 5 0 0 1 2 3 4 6 7 8 figure 14. output v oltage vs. temperature (3.3 v version) figure 15. quiescent current vs. temperature (3.3 v version) temperature ( c) temperature ( c) 125 100 75 50 25 0 ?25 ?50 3.234 3.245 3.278 3.289 3.300 3.333 3.344 3.366 125 100 75 50 25 0 ?25 ?50 100 110 120 130 140 150 quiescent current (ma) output voltage (v) quiescent current (ma) output voltage (v) quiescent current ( a) 5 6 7 125 c 25 c ?40 c v in = 13.5 v 25 45 1.5 1.8 2.1 2.4 3.3 i out = 5 ma 5 25 30 35 40 45 i out = 66 ma i out = 33 ma 150 3.256 3.267 3.311 3.322 3.355 v in = 13.5 v i out = 5 ma 150 v in = 13.5 v i out = 5 ma figure 16. output current vs. input voltage (3.3 v version) input voltage (v) 40 35 30 20 15 10 5 0 0 30 60 90 120 150 180 output current (ma) 25 45
ncv4264?2 www. onsemi.com 7 typical characteristic curves ? 3.3 v version figure 17. esr stability vs. output current (3.3 v version) output current (ma) 150 120 90 60 30 0 0 5 10 15 20 esr ( ) unstable region stable region v in = 13.5 v c out 22 f
ncv4264?2 www. onsemi.com 8 circuit description the ncv4264?2 is functionally and pin for pin compatible with ncv4264 with a lower quiescent current consumption. its output stage supplies 100 ma with 2.0% output voltage accuracy. maximum dropout voltage is 500 mv at 100 ma load current. it is internally protected against 45 v input transients, input supply reversal, output overcurrent faults, and excess die temperature. no external components are required to enable these features. regulator the error amplifier compares the reference voltage to a sample of the output voltage (v out ) and drives the base of a pnp series pass transistor by a buffer. the reference is a bandgap design to give it a temperature?stable output. saturation control of the pnp is a function of the load current and input voltage. oversaturation of the output power device is prevented, and quiescent current in the ground pin is minimized. regulator stability considerations the input capacitor c i1 in figure 2 is necessary for compensating input line reactance. possible oscillations caused by input inductance and input capacitance can be damped by using a resistor of approximately 1 in series with c i2 . the output or compensation capacitor, c out helps determine three main characteristics of a linear regulator: startup delay, load transient response and loop stability. tantalum, aluminum electrolytic, film, or ceramic capacitors are all acceptable solutions, however, attention must be paid to esr constraints. the capacitor manufacturer ?s data sheet usually provides this information. the value for the output capacitor c out shown in figure 2 should work for most applications; however, it is not necessarily the optimized solution. stability is guaranteed at values of c q 10 f, with an esr 9 for the 5.0 v version, and c q 22 f with an esr 16 for the 3.3 v version within the operating temperature range. actual limits are shown in a graph in the typical performance characteristics section. calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 2) is: p d(max) (eq. 1) v in(max) v out(min) *i out(max)
v in(max) *i q where: v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, and i q is the quiescent current the regulator consumes at i out(max) . once the value of p d(max) is known, the maximum permissible value of r ja can be calculated: p ja ( 150 c t a ) p d (eq. 2) the value of r ja can then be compared with those in the package section of the data sheet. those packages with r ja ?s less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heat sink will be required. the current flow and voltages are shown in the measurement circuit diagram. heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r ja : r ja r jc
r cs
r sa (eq. 3) where: r jc = the junction?to?case thermal resistance, r cs = the case?to?heat sink thermal resistance, and r sa = the heat sink?to?ambient thermal resistance. r ja appears in the package section of the data sheet. like r ja , it too is a function of package type. r cs and r sa are functions of the package type, heat sink and the interface between them. these values appear in data sheets of heat sink manufacturers. thermal, mounting, and heat sinking are discussed in the on semiconductor application note an1040/d, available on the on semiconductor website.
ncv4264?2 www. onsemi.com 9 figure 18. ja vs. copper spreader area figure 19. r(t) vs. pulse time copper area (mm 2 ) ja ( c/w) 0 100 200 300 400 500 600 700 0 20 40 60 80 100 120 140 160 sot223 soic?8 fused pulse time (sec) r(t) ( c/w) 0.001 0.01 0.1 1 10 100 1000 0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 soic?8 fused sot223 ordering information device package shipping ? ncv4264?2st50t3g sot?223 (pb?free) 4000 / tape & reel ncv4264?2st33t3g sot?223 (pb?free) 4000 / tape & reel ncv4264?2d33r2g soic?8 fused (pb?free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tap e sizes, please refer to our tape and reel packaging specification brochure, brd801 1/d.
ncv4264?2 www. onsemi.com 10 package dimensions sot?223 (to?261) case 318e?04 issue n 1.5 0.059 mm inches scale 6:1 3.8 0.15 2.0 0.079 6.3 0.248 2.3 0.091 2.3 0.091 2.0 0.079 soldering footprint a1 b1 d e b e e1 4 123 0.08 (0003) a l1 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: inch. h e dim a min nom max min millimeters 1.50 1.63 1.75 0.060 inches a1 0.02 0.06 0.10 0.001 b 0.60 0.75 0.89 0.024 b1 2.90 3.06 3.20 0.115 c 0.24 0.29 0.35 0.009 d 6.30 6.50 6.70 0.249 e 3.30 3.50 3.70 0.130 e 2.20 2.30 2.40 0.087 0.85 0.94 1.05 0.033 0.064 0.068 0.002 0.004 0.030 0.035 0.121 0.126 0.012 0.014 0.256 0.263 0.138 0.145 0.091 0.094 0.037 0.041 nom max l1 1.50 1.75 2.00 0.060 6.70 7.00 7.30 0.264 0.069 0.078 0.276 0.287 h e ? ? e1 0 1 0 0 1 0 l l 0.20 ??? ??? 0.008 ??? ???
ncv4264?2 www. onsemi.com 11 package dimensions soic?8 nb case 751?07 issue ak seating plane 1 4 5 8 n j x 45 k notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 6. 751?01 thru 751?06 are obsolete. new standard is 751?07. a b s d h c 0.10 (0.004) dim a min max min max inches 4.80 5.00 0.189 0.197 millimeters b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.053 0.069 d 0.33 0.51 0.013 0.020 g 1.27 bsc 0.050 bsc h 0.10 0.25 0.004 0.010 j 0.19 0.25 0.007 0.010 k 0.40 1.27 0.016 0.050 m 0 8 0 8 n 0.25 0.50 0.010 0.020 s 5.80 6.20 0.228 0.244 ?x? ?y? g m y m 0.25 (0.010) ?z? y m 0.25 (0.010) z s x s m 1.52 0.060 7.0 0.275 0.6 0.024 1.270 0.050 4.0 0.155 mm inches scale 6:1 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* ncv4264?2/d on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property . a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent? marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does o n semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, reg ulations and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typic als? must be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the right s of others. on semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semicondu ctor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates , and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or dea th associated with such unintended or unauthorized use, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semicon ductor is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your lo cal sales representative ?

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